Portions of integrated circuits (ICs) that include analog circuitry are often viewed as highly sensitive. These areas of the IC may be affected by electrical, thermal, and mechanical gradients. Designing high performance analog circuitry is dependent upon effectively dealing with these gradients, particularly for analog circuitry that occupies a large area of the IC.
As an example, consider a current source used in a digital-to-analog converter (DAC). The current source may occupy a large area of the IC. For example, a “current steering” type of DAC typically includes a current source occupying a large area and a plurality of current steering switches that route current to selected outputs depending on the digital code that is input or provided. Often, the current source is made from an array of unit transistors. The size of the current source may be on the order of square millimeters. A high performance DAC must cancel out electrical, thermal, and mechanical gradients that occur with the IC, else linearity of the DAC is degraded.
Wire bonded packages are frequently used for packaging ICs with large portions of analog circuitry. In a wire bonded package, bond pads are distributed around the periphery of the IC thereby avoiding placement of bond pads over the sensitive analog circuitry. As flip-chip technologies become more prevalent, however, reliable mechanical attachment of a die to another structure such as a package substrate or an interposer requires a minimum density of solder bumps. Modern ICs implemented using flip-chip technologies avoid using solder bumps over sensitive analog circuitry to avoid degrading performance of the analog circuitry. Avoiding bump formation over such large portions of the IC, however, may violate minimum density design rules for IC fabrication and is problematic for the structural integrity of the resulting IC.